verilator 5.048-1
| Architecture: | x86_64 |
|---|---|
| Repository: | Extra |
| Description: | The fastest free Verilog HDL simulator |
| Upstream URL: | https://www.veripool.org/verilator/ |
| License(s): | Artistic-2.0, LGPL-3.0-only |
| Maintainers: |
Felix Yan Filipe Laíns |
| Package Size: | 6.2 MB |
| Installed Size: | 27.6 MB |
| Last Packager: | Felix Yan |
| Build Date: | 2026-04-26 16:13 UTC |
| Signed By: | Felix Yan |
| Signature Date: | 2026-04-26 16:32 UTC |
| Last Updated: | 2026-04-26 16:34 UTC |